IBM, the Quantum Science Center at Oak Ridge National Laboratory (ORNL), and AMD have launched a quantum error correction (QEC) co-design platform at IBM’s Poughkeepsie facility. The platform colocates IBM’s 120-qubit Quantum Nighthawk r2 processor with ORNL’s Umbra high-performance computing system, which uses AMD Instinct MI355X GPUs and 5th Gen AMD EPYC CPUs for hardware-level decoding acceleration. On-premises co-location enables sub-millisecond round-trip feedback loops for real-time syndrome processing, allowing GPU-accelerated decoders to keep pace with the QPU’s 100,000 circuits-per-second repetition rate. The testbed targets scaling from 70 to 100 logical qubits by 2028 under the DOE Quantum Genesis Mission, focusing on multi-layered error-correcting codes and condensed-matter physics simulations linked to ORNL’s Spallation Neutron Source. 1
Published by Quantum Computing Report · On GETSECURE.ai ·
IBM, ORNL, and AMD Deploy Co-Located Quantum Error Correction Platform in Poughkeepsie
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Why This Matters
If you work with quantum or high-performance computing, you should watch this platform because it demonstrates a low-latency architecture that could accelerate fault-tolerant quantum workloads.
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References
- Quantum Computing Report. (2026, November 6). IBM, ORNL, and AMD Deploy Co-Located Quantum Error Correction Platform in Poughkeepsie. Quantum Computing Report. https://quantumcomputingreport.com/ibm-ornl-and-amd-deploy-co-located-quantum-error-correction-platform-in-poughkeepsie/
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